Układy CMOS i TTL

4072 – Dwukrotne, 4-wejściowe bramki OR

1 Czas czytania (min)
    +---+--+---+             +---+---+---+---*---+
 1Y |1  +--+ 14| VCC         | A | B | C | D |/Y |   Y = A+B+C+D
 1A |2       13| 2Y          +===+===+===+===*===+
 1B |3       12| 2D          | 0 | 0 | 0 | 0 | 0 |
 1C |4  4072 11| 2C          | 0 | 0 | 0 | 1 | 1 |
 1D |5       10| 2B          | 0 | 0 | 1 | X | 1 |
    |6        9| 2A          | 0 | 1 | X | X | 1 |
GND |7        8|             | 1 | X | X | X | 1 |
    +----------+             +---+---+---+---*---+