Układy CMOS i TTL

4096 – Przerzutnik J-K master-slave z bramkami AND na wejściach J i K, oraz dwoma wejściami J i K zanegowanymi

1 Czas czytania (min)
     +---+--+---+            +---------+---------+---+---+---*---+---+
     |1  +--+ 14| VCC        |J1.J2./J3|K1.K2./K3|CLK|SET|RST| Q |/Q |
 RST |2       13| SET        +=========+=========+===+===+===*===+===+
  J1 |3       12| CLK        |    X    |    X    | X | 1 | 1 | 0 | 0 |
  J2 |4  4096 11| K1         |    X    |    X    | X | 1 | 0 | 1 | 0 |
 /J3 |5       10| K2         |    X    |    X    | X | 0 | 1 | 0 | 1 |
  /Q |6        9| /K3        |    0    |    0    | / | 0 | 0 | - | - |
 GND |7        8| Q          |    0    |    1    | / | 0 | 0 | 0 | 1 |
     +----------+            |    1    |    0    | / | 0 | 0 | 1 | 0 |
                             |    1    |    1    | / | 0 | 0 |/Q | Q |
                             |    X    |    X    |!/ | 0 | 0 | - | - |
                             +---------+---------+---+---+---*---+---+